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-rw-r--r-- | RiscV.wiki | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -3,3 +3,6 @@ https://github.com/domus128/vhdlisp = FPGA = - DE10-Standard + +== Lysator == +- libnsl på ronon |
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-rw-r--r-- | RiscV.wiki | 3 |
@@ -3,3 +3,6 @@ https://github.com/domus128/vhdlisp = FPGA = - DE10-Standard + +== Lysator == +- libnsl på ronon |